The present invention relates to a semiconductor memory and in particular to a circuit for compensating for voltage drops along word lines and digit lines so as to allow the memory to be operated over a wide operational range.
A semiconductor memory, such as a bipolar memory, comprises a number of memory cells arranged in matrix form. With the progress of LSI (Large Scale integration) technology, it has become possible to form a considerably large number of cells in a single chip. As a result, wirings between memory cells have been necessarily reduced in size, both in width and thickness. Word lines and digit lines made of aluminum are usually designed in this field to be 5 to 10 .mu.m in width at the present time. It is expected in the near future that these lines may be reduced as small as 1 to 5 .mu.m in width.
However, fine wiring structure results in some problems with the normal operation of the semiconductor memory. One of them is that the voltage drops developed along word lines and digit lines are not negligibly small because of the relatively high resistance of these lines. Especially, this disadvantage may be enhanced when the memory cells are provided with large current flowing there-through in order to realize a high-speed memory.